1基本信息

姓 名：任骜

性 别：男

职 称： 教授（博导、硕导）

职 务：

电 话：

办公地点： 主教626

E-mail：ren.ao@cqu.edu.cn

研究方向： 机器学习、深度学习系统加速、计算机体系结构等

招生信息：年度招收硕士研究生3名，博士1名

2个人简介：

任骜，重庆大学“弘深青年学者”，美国东北大学博士。中国计算机学会会员，国际计算机学会（ACM）会员，国际电子工程师学会（IEEE）会员。主要研究兴趣是高性能低功耗的深度学习系统，包括深度学习系统的加速算法和人工智能芯片设计。共参与了五块人工智能芯片的设计与流片。其它研究兴趣还包括计算机体系构架、芯片设计、小样本学习、神经构架搜索、多模态学习、随机运算等。先后在国际顶级会议与期刊发表专业学术论文30余篇。其中6篇代表性论文发表在人工智能领域与计算机体系结构领域的国际顶级会议上（CCF-A类），包括ISCA、ASPLOS、AAAI、ISSCC等。获得ICASSP的最佳论文奖和最佳学生研究竞赛奖，ISQED最佳论文提名等荣誉与奖励。申请发明专利3项。受邀为多个国际期刊和会议担任审稿人，包括：TNNLS、TVLSI、TCAS-II、THPC、Inf. Sci.、Computer、JSA、Integration、ISCAS、ISVLSI、MWSCAS、ICMLA等。担任ICMLA、ASAP技术评议会评审委员(TPC Member)。

3学术成果

论文

会议论文

1. [AAAI'20]A. Ren, T. Zhang, Y. Wang, S. Lin, P. Dong, Y.K. Chen, Y. Xie, and Y. Wang, “DARB: A Density-Adaptive Regular-Block Pruning for Deep Neural Networks,” inProc. of the 34th AAAI Conference on Artificial Intelligence (AAAI), 2020. (CCF A，接收率：20.8%)

2. [ASPLOS'19]A. Ren, T. Zhang, S. Ye, W. Xu, X. Qian, X. Lin, and Y. Wang, “ADMM-NN: An Algorithm-Hardware Co-Design Framework of DNNs Using Alternating Direction Methods of Multipliers,” inProc. of the 24th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2019. (CCF A，接收率：21.1%)

3. [ISCA'19]R. Cai,A. Ren, O. Chen, N. Liu, C. Ding, X. Qian, J. Han, W. Luo, N. Yoshikawa, and Y. Wang, “A stochastic-computing based deep learning framework using adiabatic quantum-flux-parametron superconducting technology,” inProc. of the 46th International Symposium on Computer Architecture (ISCA), 2019. (CCF A，接收率：16.9%)

4. [ISSCC'19]J. Yue, R. Liu, W. Sun, Z. Yuan, Z. Wang, Y. Tu, Y. Chen,A. Ren, Y. Wang, M. Chang, X. Li, H. Yang, and Y. Liu, “7.5 A 65nm 0.39-to-140.3 TOPS/W 1-to-12b Unified Neural Network Processor Using Block-Circulant-Enabled Transpose-Domain Acceleration with 8.1× Higher TOPS/mm2 and 6T HBST-TRAM-Based 2D Data-Reuse Architecture,” inProc. of IEEE International Solid-State Circuits Conference (ISSCC), 2019. (CCF A)

5. [ICCD'19]R. Cai, O. Chen,A. Ren, N. Liu, N. Yoshikawa, and Y. Wang, “A Buffer and Splitter Insertion Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits,” inProc. of the 37th IEEE International Conference on Computer Design (ICCD), 2019. (CCF B)

6. [GLVLSI'19]R. Cai, O. Chen,A. Ren, N. Liu, C. Ding, N. Yoshikawa, and Y. Wang, “A Majority Logic Synthesis Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits,” inProc. of the 29th ACM Great Lakes Symposium on VLSI (GLVLSI), 2019. (CCF C)

7. [ISVLSI'19]R. Cai, X. Ma, O. Chen,A. Ren, N. Liu, N. Yoshikawa, and Y. Wang, “IDE Development, Logic Synthesis and Buffer/Splitter Insertion Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits,”inProc. of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2019. (CCF C)

8. [ASPLOS'18,共同一作]R. Cai,A. Ren, N. Liu, C. Ding, L. Wang, X., M. Pedram, and Y. Wang, “VIBNN: Hardware acceleration of Bayesian neural networks,” inProc. of the 23th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2018. (CCF A，接收率：17.6%)

9. [GLVLSI'18,共同一作]C. Ding,A. Ren, G. Yuan, X. Ma, J. Li, N. Liu, B. Yuan, and Y. Wang, “Structured weight matrices-based hardware accelerators in deep neural networks: FPGAs and ASICs,” inProc. of the 28th ACM Great Lakes Symposium on VLSI (GLVLSI), 2018. (CCF C)

10. [ISVLSI'18]Z. Li, J. Li, A. Ren, C. Ding, J. Draper, Q. Qiu, B. Yuan, and Y. Wang, “Towards budget-driven hardware optimization for deep convolutional neural networks using stochastic computing,” inProc. of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2018. (CCF C)

11. [ISQED'18]X. Ma, Y. Zhang, G. Yuan, A. Ren, Z. Li, J. Han, J. Hu, and Y. Wang, “An area and energy efficient design of domain-wall memory-based deep convolutional neural networks using stochastic computing,”inProc. of 19th International Symposium on Quality Electronic Design (ISQED), 2018.Best paper nomination

12. [ASPLOS'17]A. Ren, J. Li, Z. Li, C. Ding, X. Qian, Q. Qiu, B. Yuan, and Y. Wang, “SC-DCNN: Highly-Scalable Deep Convolutional Neural Network using Stochastic Computing,” inProc. of the 22nd International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2017. (CCF A，接收率：17.4%)

13. [ICCAD'17]H. Li, T. Wei, A. Ren, Q. Zhu, and Y. Wang, “Deep reinforcement learning: Frame-work, applications, and embedded implementations,” inProc. of the 36th International Conference on Computer-Aided Design (ICCAD), 2017. (CCF B)

14. [ICCD'17]R. Cai, A. Ren, L. Wang, M. Pedram, and Y. Wang, “Hardware acceleration of Bayesian neural networks using RAM based linear feedback gaussian random number generators,” inProc. of the 35th IEEE International Conference on Computer Design (ICCD), 2017. (CCF B)

15. [MWSCAS'17]G. Yuan, C. Ding, R. Cai, X. Ma, Z. Zhao, A. Ren, B. Yuan, and Y. Wang, “Memristor crossbar-based ultra-efficient next-generation baseband processors,”inProc. of the 60th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2017.

16. [IJCNN'17]J. Li, Z. Yuan, Z. Li, C. Ding, A. Ren, Q. Qiu, J. Draper, and Y. Wang, “Hardware-driven nonlinear activation for stochastic computing-based deep convolutional neural networks,” inProc. of the International Joint Conference on Neural Networks (IJCNN), 2017. (CCF C)

17. [GLVLSI'17]Z. Yuan, J. Li, Z. Li, C. Ding, A. Ren, B. Yuan, Q. Qiu, J. Draper, and Y. Wang, “Softmax regression design for stochastic computing-based deep convolutional neural networks,” inProc. of the 27th ACM Great Lakes Symposium on VLSI (GLVLSI), 2017. (CCF C)

18. [DATE'17]Z. Li,A. Ren, J. Li, Q. Qiu, B. Yuan, J. Draper, and Y. Wang, “Structural design optimization for deep convolutional neural networks using stochastic computing,” inProc. of the Conference on Design, Automation and Test in Europe (DATE), 2017. (CCF B)

19. [ICASSP'17]S. Liu, A. Ren, Y. Wang, P. K. Varshney, “Ultra-fast robust compressive sensing based on memristor crossbars,” inProc. of 42nd IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2017. Best Paper Award, Best Student Presentation Award (Top 3 in more than 2,000 submissions)(CCF B)

20. [ASP-DAC'17]A. Ren, S. Liu, R. Cai, W. Wen, P. K. Varshney, and Y. Wang, “Algorithm-hardware co-optimization of the memristor-based framework for solving SOCP and homogeneous QCQP problems,” inProc. of 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 2017. (CCF C)

21. [ASP-DAC'17]J. Li, A. Ren, Z. Li, C. Ding, B. Yuan, Q. Qiu, and Y. Wang, “Towards acceleration of deep convolutional neural networks using stochastic computing,” inProc. of 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 2017. (CCF C)

22. [ICRC'16]A. Ren, Z. Li, B. Yuan, Q. Qiu, and Y. Wang, “Designing reconfigurable large-scale deep learning systems using stochastic computing,”inProc. of IEEE International Conference on Rebooting Computing (ICRC), 2016.

23. [ICCD'16,共同一作]Zhe Li, A. Ren, J. Li, Q. Qiu, Y. Wang, and B. Yuan, “DSCNN: Hardware-oriented optimization for Stochastic Computing based Deep Convolutional Neural Networks,” inProc. of the 34th IEEE International Conference on Computer Design (ICCD), 2016. (CCF B)

24. [SOCC'16]A. Ren, B. Yuan, and Y. Wang, “Design of high-speed low-power polar BP decoder using emerging technologies,” inProc. of the 29th IEEE International System-on-Chip Conference (SOCC), 2016.

25. [SOCC'16]R. Cai, A. Ren, Y. Wang, S. Soundarajan, Q. Qiu, B. Yuan, and P. Bogdan, “A low-computation-complexity, energy-efficient, and high-performance linear program solver using memristor crossbars,”inProc. of the 29th IEEE International System-on-Chip Conference, 2016.

26. [ISVLSI'16]R. Cai, A. Ren, Y. Wang, and B. Yuan, “Memristor-based discrete Fourier transform for improving performance and energy efficiency,”inProc. of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2016.

期刊论文

1. [JSSC'20]J. Yue, R. Liu, W. Sun, Z. Yuan, Z. Wang, Y. Tu, Y. Chen, A. Ren, Y. Wang, M. Chang, X. Li, H. Yang, and Y. Liu, “STICKER-T: An Energy Efficient Neural Network Processor Using Block-Circulant Algorithm and Unified Frequency-Domain Acceleration,” in the IEEE Journal of Solid State Circuits (JSSC), 2020. (SJR Q1)

2. [2D Mater. '19,共同一作]Y. Qiang, A. Ren, X. Zhang, P. Patel, X.n Han, K. Seo, Z. Shi, Y. Wang, and H. Fang, “Design of Atomically-Thin-Body Field-Effect Sensors and Pattern Recognition Neural Networks for Ultra-Sensitive and Intelligent Trace Explosive Detection,” in2D Materials, 2019. (SJR Q1)

3. [INTEGRATION'19]J. Li, Z. Yuan, Z. Li, A. Ren, C. Ding, J. Draper, S. Nazarian, Q. Qiu, B. Yuan, and Y. Wang, “Normalization and dropout for stochastic computing-based deep convolutional neural networks,” in Integration, the VLSI Journal, 2017. (SJR Q1)

4. [TCAD'18]Z. Li, J. Li, A. Ren, R. Cai, C. Ding, X. Qian, J. Draper, B. Yuan, J. Tang, Q. Qiu, and Y. Wang, “HEIF: Highly Efficient Stochastic Computing based Inference Framework for Deep Neural Networks,” in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018. (CCF A, SJR Q2)

5. [Nano Commun. Netw. '18]R. Cai, A. Ren, S. Soundarajan, and Y. Wang, “A low-computation-complexity, energy-efficient, and high-performance linear program solver based on primal-dual interior-point method using memristor crossbars,” in Nano Communication Networks, 2018. (SJR Q2)

专利申请

1.A. Ren, Y. Wang, T. Zhang, Y. Xie, “Structured Pruning for Machine Learning Model,”美国专利

2.A. Ren, T. Zhang, Y. Wang, Y. Xie, “Method and System for Processing a Neural Network,”美国专利

3. F. Sun,A. Ren, “Artificial Neural Network with Sparse Weights,”美国专利